PnR Messages

Report Title PnR Report
Design File /home/milton/kraft80/hardware/TANG-NANO-VIDEO/hdmi/impl/gwsynthesis/hdmi.vg
Physical Constraints File /home/milton/kraft80/hardware/TANG-NANO-VIDEO/hdmi/src/hdmi.cst
Timing Constraints File /home/milton/kraft80/hardware/TANG-NANO-VIDEO/hdmi/src/hdmi.sdc
Tool Version V1.9.11.01 Education
Part Number GW1NR-LV9QN88PC6/I5
Device GW1NR-9
Device Version C
Created Time Fri Oct 3 17:03:28 2025
Legal Announcement Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved.

PnR Details

Place & Route Process Running placement: Placement Phase 0: CPU time = 0h 0m 0.236s, Elapsed time = 0h 0m 0.235s Placement Phase 1: CPU time = 0h 0m 0.024s, Elapsed time = 0h 0m 0.023s Placement Phase 2: CPU time = 0h 0m 0.148s, Elapsed time = 0h 0m 0.148s Placement Phase 3: CPU time = 0h 0m 0.668s, Elapsed time = 0h 0m 0.661s Total Placement: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s Running routing: Routing Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s Routing Phase 1: CPU time = 0h 0m 0.226s, Elapsed time = 0h 0m 0.225s Routing Phase 2: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s Total Routing: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s Generate output files: CPU time = 0h 0m 0.163s, Elapsed time = 0h 0m 0.161s
Total Time and Memory Usage CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s, Peak memory usage = 445MB

Resource

Resource Usage Summary:

Resource Usage Utilization
Logic 2230/8640 26%
    --LUT,ALU,ROM16 2152(1747 LUT, 405 ALU, 0 ROM16) -
    --SSRAM(RAM16) 13 -
Register 1054/6693 16%
    --Logic Register as Latch 0/6480 0%
    --Logic Register as FF 1042/6480 17%
    --I/O Register as Latch 0/213 0%
    --I/O Register as FF 12/213 6%
CLS 1479/4320 35%
I/O Port 46/71 65%
I/O Buf 42 -
    --Input Buf 13 -
    --Output Buf 19 -
    --Inout Buf 10 -
IOLOGIC 3 OSER10
7%
BSRAM 19 DPB
1 pROM
77%

I/O Bank Usage Summary:

I/O Bank UsageUtilization
bank 1 18/2572%
bank 2 17/2374%
bank 3 11/2348%

Clock Resource Usage Summary:

Clock Resource Usage Utilization
PRIMARY 4/8 50%
LW 2/8 25%
GCLK_PIN 3/3 100%
CLKDIV 1/8 13%
rPLL 1/2 50%

Global Clock Signals:

Signal Global Clock Location
cpuclk_d PRIMARY TR TL BR BL
clk_p PRIMARY TR TL BR BL
test1/wng1/fsr_clk PRIMARY BL
svo_hdmi_inst/svo_tcard/bram_aclock PRIMARY TR TL BR BL
nrst_d LW -
svo_hdmi_inst/n147_5 LW -
clk_d HCLK BOTTOM[0]
clk_p5 HCLK TOP[0]

Pinout by Port Name:

Port Name Diff Pair Loc./Bank Constraint Dir. Site CFG IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Vref Single Resistor Diff Resistor BankVccio
ncs - 34/2 Y in IOB23[B] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
nwr - 28/2 Y in IOB11[B] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
nrd - 29/2 Y in IOB13[A] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
nrst - 30/2 Y in IOB13[B] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
addr[0] - 82/3 Y in IOT11[A] - LVCMOS18 NA UP ON NONE NA NA OFF NA 1.8
addr[1] - 81/3 Y in IOT11[B] - LVCMOS18 NA UP ON NONE NA NA OFF NA 1.8
addr[2] - 80/3 Y in IOT12[A] - LVCMOS18 NA UP ON NONE NA NA OFF NA 1.8
addr[3] - 79/3 Y in IOT12[B] - LVCMOS18 NA UP ON NONE NA NA OFF NA 1.8
cpuclk - 33/2 Y in IOB23[A] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
rxd_serial - 27/2 Y in IOB11[A] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
disk_miso - 39/2 Y in IOB33[A] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
clk - 52/1 Y in IOR17[A] GCLKT_3 LVCMOS33 NA UP ON NONE NA NA OFF NA 3.3
resetn - 4/3 Y in IOL5[A] JTAGSEL_N/LPLL_T_in LVCMOS18 NA UP ON NONE NA NA OFF NA 1.8
intr_out - 40/2 Y out IOB33[B] - LVCMOS33 8 NONE NA NA OFF NA NA NA 3.3
led[0] - 10/3 Y out IOL15[A] GCLKT_6 LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
led[1] - 11/3 Y out IOL16[B] - LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
led[2] - 13/3 Y out IOL21[B] - LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
led[3] - 14/3 Y out IOL22[B] - LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
led[4] - 15/3 Y out IOL25[B] - LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
led[5] - 16/3 Y out IOL26[B] - LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
dacser - 49/1 Y out IOR24[A] - LVCMOS33 8 UP NA NA OFF NA OFF NA 3.3
dacsclk - 31/2 Y out IOB15[A] - LVCMOS33 8 UP NA NA OFF NA NA NA 3.3
dacrclk - 32/2 Y out IOB15[B] - LVCMOS33 8 UP NA NA OFF NA NA NA 3.3
txd_serial - 26/2 Y out IOB8[B] - LVCMOS33 8 UP NA NA OFF NA NA NA 3.3
rts_serial - 63/1 Y out IOR5[A] RPLL_T_in LVCMOS33 8 UP NA NA OFF NA OFF NA 3.3
disk_mosi - 37/2 Y out IOB31[A] - LVCMOS33 8 UP NA NA OFF NA NA NA 3.3
disk_sck - 36/2 Y out IOB29[B] GCLKC_4 LVCMOS33 8 UP NA NA OFF NA NA NA 3.3
disk_cs - 76/1 Y out IOT37[B] - LVCMOS33 8 UP NA NA OFF NA OFF NA 3.3
tmds_clk_p tmds_clk_n 69,68/1 Y out IOT42 - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
tmds_d_p[0] tmds_d_n[0] 71,70/1 Y out IOT41 - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
tmds_d_p[1] tmds_d_n[1] 73,72/1 Y out IOT39 - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
tmds_d_p[2] tmds_d_n[2] 75,74/1 Y out IOT38 - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
data[0] - 41/2 Y io IOB41[A] - LVCMOS33 8 UP NA NONE OFF NA NA NA 3.3
data[1] - 42/2 Y io IOB41[B] - LVCMOS33 8 UP NA NONE OFF NA NA NA 3.3
data[2] - 51/1 Y io IOR17[B] GCLKC_3 LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
data[3] - 53/1 Y io IOR15[B] DOUT/WE_N LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
data[4] - 54/1 Y io IOR15[A] DIN/CLKHOLD_N LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
data[5] - 55/1 Y io IOR14[B] SSPI_CS_N/D0 LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
data[6] - 56/1 Y io IOR14[A] SO/D1 LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
data[7] - 57/1 Y io IOR13[A] FASTRD_N/D3 LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
ps2data - 35/2 Y io IOB29[A] GCLKT_4 LVCMOS33 8 NONE NA NONE OFF NA NA NA 3.3
ps2clk - 25/2 Y io IOB8[A] - LVCMOS33 8 NONE NA NONE OFF NA NA NA 3.3

All Package Pins:

Loc./Bank Signal Dir. Site CFG IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Vref Single Resistor Diff Resistor Bank Vccio
3/3 - in IOT2[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
88/3 - in IOT5[A] MODE0 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
87/3 - in IOT6[B] MODE1 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
86/3 - in IOT8[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
85/3 - in IOT8[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
84/3 - in IOT10[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
83/3 - in IOT10[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
82/3 addr[0] in IOT11[A] - LVCMOS18 NA UP ON NONE NA NA OFF NA 1.8
81/3 addr[1] in IOT11[B] - LVCMOS18 NA UP ON NONE NA NA OFF NA 1.8
80/3 addr[2] in IOT12[A] - LVCMOS18 NA UP ON NONE NA NA OFF NA 1.8
79/3 addr[3] in IOT12[B] - LVCMOS18 NA UP ON NONE NA NA OFF NA 1.8
77/1 - in IOT37[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
76/1 disk_cs out IOT37[B] - LVCMOS33 8 UP NA NA OFF NA OFF NA 3.3
75/1 tmds_d_p[2] out IOT38[A] - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
74/1 tmds_d_n[2] out IOT38[B] - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
73/1 tmds_d_p[1] out IOT39[A] - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
72/1 tmds_d_n[1] out IOT39[B] - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
71/1 tmds_d_p[0] out IOT41[A] - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
70/1 tmds_d_n[0] out IOT41[B] - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
69/1 tmds_clk_p out IOT42[A] - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
68/1 tmds_clk_n out IOT42[B] - LVCMOS33D 8 NONE NA NA NA NA OFF NA 3.3
17/2 - in IOB2[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
18/2 - in IOB2[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
19/2 - in IOB4[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
20/2 - in IOB4[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
25/2 ps2clk io IOB8[A] - LVCMOS33 8 NONE NA NONE OFF NA NA NA 3.3
26/2 txd_serial out IOB8[B] - LVCMOS33 8 UP NA NA OFF NA NA NA 3.3
27/2 rxd_serial in IOB11[A] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
28/2 nwr in IOB11[B] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
29/2 nrd in IOB13[A] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
30/2 nrst in IOB13[B] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
31/2 dacsclk out IOB15[A] - LVCMOS33 8 UP NA NA OFF NA NA NA 3.3
32/2 dacrclk out IOB15[B] - LVCMOS33 8 UP NA NA OFF NA NA NA 3.3
33/2 cpuclk in IOB23[A] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
34/2 ncs in IOB23[B] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
35/2 ps2data io IOB29[A] GCLKT_4 LVCMOS33 8 NONE NA NONE OFF NA NA NA 3.3
36/2 disk_sck out IOB29[B] GCLKC_4 LVCMOS33 8 UP NA NA OFF NA NA NA 3.3
37/2 disk_mosi out IOB31[A] - LVCMOS33 8 UP NA NA OFF NA NA NA 3.3
38/2 - in IOB31[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
39/2 disk_miso in IOB33[A] - LVCMOS33 NA UP ON NONE NA NA NA NA 3.3
40/2 intr_out out IOB33[B] - LVCMOS33 8 NONE NA NA OFF NA NA NA 3.3
41/2 data[0] io IOB41[A] - LVCMOS33 8 UP NA NONE OFF NA NA NA 3.3
42/2 data[1] io IOB41[B] - LVCMOS33 8 UP NA NONE OFF NA NA NA 3.3
47/2 - in IOB43[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
p1-14/3 - in IOL2[A] - LVCMOS18 - UP - - - - - - -
p1-13/3 - in IOL2[B] - LVCMOS18 - UP - - - - - - -
p1-12/3 - in IOL3[A] - LVCMOS18 - UP - - - - - - -
p1-11/3 - in IOL3[B] - LVCMOS18 - UP - - - - - - -
p1-10/3 - in IOL4[A] - LVCMOS18 - UP - - - - - - -
4/3 resetn in IOL5[A] JTAGSEL_N/LPLL_T_in LVCMOS18 NA UP ON NONE NA NA OFF NA 1.8
p1-9/3 - in IOL6[B] LPLL_C_fb LVCMOS18 - UP - - - - - - -
p1-8/3 - in IOL7[A] - LVCMOS18 - UP - - - - - - -
p1-7/3 - in IOL8[A] - LVCMOS18 - UP - - - - - - -
p1-6/3 - in IOL9[A] GCLKT_7 LVCMOS18 - UP - - - - - - -
5/3 - in IOL11[A] TMS LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
6/3 - in IOL11[B] TCK LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
7/3 - in IOL12[B] TDI LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
8/3 - out IOL13[A] TDO LVCMOS18 8 UP NA NA OFF NA NA NA 1.8
9/3 - in IOL13[B] RECONFIG_N LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p1-5/3 - in IOL14[A] DONE LVCMOS18 - UP - - - - - - -
10/3 led[0] out IOL15[A] GCLKT_6 LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
p1-4/3 - in IOL16[A] - LVCMOS18 - UP - - - - - - -
11/3 led[1] out IOL16[B] - LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
p1-2/3 - in IOL17[A] - LVCMOS18 - UP - - - - - - -
p1-3/3 - in IOL17[B] - LVCMOS18 - UP - - - - - - -
p2-14/3 - in IOL18[A] - LVCMOS18 - UP - - - - - - -
p2-13/3 - in IOL18[B] - LVCMOS18 - UP - - - - - - -
p2-12/3 - in IOL20[A] - LVCMOS18 - UP - - - - - - -
p2-11/3 - in IOL20[B] - LVCMOS18 - UP - - - - - - -
p2-10/3 - in IOL21[A] - LVCMOS18 - UP - - - - - - -
13/3 led[2] out IOL21[B] - LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
p2-9/3 - in IOL22[A] - LVCMOS18 - UP - - - - - - -
14/3 led[3] out IOL22[B] - LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
p2-8/3 - in IOL23[A] - LVCMOS18 - UP - - - - - - -
p2-7/3 - in IOL23[B] - LVCMOS18 - UP - - - - - - -
p2-6/3 - in IOL24[B] - LVCMOS18 - UP - - - - - - -
p2-5/3 - in IOL25[A] - LVCMOS18 - UP - - - - - - -
15/3 led[4] out IOL25[B] - LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
p2-4/3 - in IOL26[A] - LVCMOS18 - UP - - - - - - -
16/3 led[5] out IOL26[B] - LVCMOS18 8 UP NA NA OFF NA OFF NA 1.8
p2-3/3 - in IOL27[A] - LVCMOS18 - UP - - - - - - -
p2-2/3 - in IOL27[B] - LVCMOS18 - UP - - - - - - -
63/1 rts_serial out IOR5[A] RPLL_T_in LVCMOS33 8 UP NA NA OFF NA OFF NA 3.3
62/1 - in IOR11[A] MI/D7 LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
61/1 - in IOR11[B] MO/D6 LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
60/1 - in IOR12[A] MCS_N/D5 LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
59/1 - in IOR12[B] MCLK/D4 LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
57/1 data[7] io IOR13[A] FASTRD_N/D3 LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
56/1 data[6] io IOR14[A] SO/D1 LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
55/1 data[5] io IOR14[B] SSPI_CS_N/D0 LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
54/1 data[4] io IOR15[A] DIN/CLKHOLD_N LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
53/1 data[3] io IOR15[B] DOUT/WE_N LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
52/1 clk in IOR17[A] GCLKT_3 LVCMOS33 NA UP ON NONE NA NA OFF NA 3.3
51/1 data[2] io IOR17[B] GCLKC_3 LVCMOS33 8 UP NA NONE OFF NA OFF NA 3.3
50/1 - in IOR22[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 3.3
49/1 dacser out IOR24[A] - LVCMOS33 8 UP NA NA OFF NA OFF NA 3.3
48/1 - in IOR24[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 3.3